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ACT 7940/2024

—·EP2201740: HIGH SPEED PACKET PROCESSING IN A WIRELESS NETWORK

Case details
Status
—
Action
Infringement
Category
Main Infringement Action
Parties
Claimants
Reps: Thomas Adam
Respondents
Reps: Johannes Heselberger
Division
Hamburg LD
Judges
Technology
Telecoms · Wireless Networking · Telecommunications
Language
—
First decided
Feb 19, 2025
Claims
At issueall
Maintainedall
Not infringedall
Notes: Hamburg Local Division dismissed infringement of EP 2 201 740 B1 (DMA-based header writing mechanism not met); Anspruch 6 (product claim) also not infringed for same reasons; revocation counterclaim dismissed, patent maintained.
Decisions
  • 2025-02-19
    Not infringedInfringement meritsInfringement Action

    Hamburg Local Division final decision in infringement action (with revocation counterclaim) concerning a patent for reducing latency in wireless network data packet processing (claimed as standard-essential). Both the infringement claim and the revocation counterclaim were dismissed. The court found non-infringement after interpreting the patent claims with reference to the description and drawings (Art. 69 EPC), concluding that the defendant's Cisco products did not implement the claimed DMA-based simultaneous header writing mechanism. The revocation counterclaim also failed. Costs were split: claimant to bear 40%, defendants 60%.

    Legal issues:Patent claim interpretation (Art. 69 EPC)Non-infringementLatency in wireless network data packet processingRevocation counterclaim dismissed
Documents
  • D416FE5521DCEE839041BBFCEF418CD0_de.pdf2025-02-19GERMAN
Plain-English summary

Lionra Technologies Ltd. sued Cisco Systems GmbH and Cisco Systems Inc. before the Hamburg Local Division for infringement of EP 2 201 740, a patent relating to DMA-based latency reduction in wireless packet processing. The court dismissed the infringement claim after construing the 'simultaneous header writing' requirement against the patent description and finding Cisco's Ingress FIFO architecture did not meet it. The revocation counterclaim was also dismissed, and costs were split 40% (claimant) / 60% (defendants).

Accepted arguments
What the court agreed with — by party.

  • Patent claims must be interpreted with reference to description and drawings, not based on literal wording alone

    RespondentLegal basis: Art. 69 EPC; Art. 25 UPCA

    Note: Hamburg LD held that claim construction must incorporate express disclosures in the description; the description limited the DMA-based simultaneous header-writing requirement.

  • Cisco products do not implement simultaneous header writing by a DMA into packet buffer memory and protocol stack layer memory as required by the patent

    RespondentLegal basis: Art. 25 UPCA

    Note: The court found that the Ingress FIFO does not simultaneously write headers to both a packet buffer and protocol-stack layer memory; simultaneity criterion was not met.

Rejected arguments
What the court did not agree with — and why.

  • Cisco products implement the claimed DMA-based simultaneous header-writing mechanism

    ClaimantLegal basis: Art. 69 EPC; Art. 25 UPCA

    Reason: The Ingress FIFO sends only the first 256 bytes as a single data stream to the IFC; headers are not immediately available in the stack-layer memory but must first be extracted by a parser — the simultaneity criterion is absent.

  • Auxiliary requests establish infringement on alternative claim readings

    Claimant

    Reason: Because the main claim features were not implemented, the auxiliary requests were not separately evaluated.

Key legal principles
Doctrines and rules cited in the reasoning.
Claim construction must use description and express disclosures alongside claim wording (Art. 69 EPC)Simultaneity requirement in DMA-based packet processing is a substantive claim limitationNon-infringement of main claim renders auxiliary request analysis unnecessary

Browse other cases on this principle.

Claim construction notes

The patent claims a DMA that simultaneously writes the header into a packet buffer store and into the memory in the respective layer of the protocol stack (as illustrated in Figure 4). The court construed 'simultaneously' strictly: the Cisco Ingress FIFO writes only 256 bytes as a single stream; the header is not immediately available in the stack-layer memory but requires extraction by a parser. Neither the Ingress FIFO alone nor the combination of Ingress FIFO and IFC satisfy the simultaneity requirement.