UPC Analytics
ENDE
Overview · Filed: Dec 2, 2024

UPC_CFI_757/2024

Inductor layout for reduced VCO coupling

InfringementMain Infringement ActionLisbon LDInfringementOral Phase
OverviewDecisionsDocumentsTimeline
Parties

Claimants

Respondents

  • ASUSTek Computer Inc.
  • Digital River Ireland Ltd.
Judges
  • Rute Lopes
  • Petri Rinkinen
  • Samuel Granata
  • Johannes Mesa Pascasio
Patents
  • EP2819131
CPC codes: H01F17/0006, H01F27/346, H01F2017/0073, H01F17/00

Technology area: Telecoms · Cellular/SEP

Sector: Electrical Components

Outcome
—
Filed: Dec 2, 2024
First decided: —
Language: English
Open on UPC Registry