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EP3850660

THREE-DIMENSIONAL MEMORY DEVICES HAVING THROUGH STAIR CONTACTS AND METHODS FOR FORMING THE SAME

Angemeldet
2. Jan. 2019
Technologie
Electrical engineering · Semiconductors
UPC-Verfahren
1
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Zusammenfassung

Embodiments of three-dimensional (3D) memory devices having through stair contacts (TSCs) and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device (100) is disclosed. A dielectric stack (104) including a plurality of interleaved dielectric layers (112) and sacrificial layers (110) is formed on a substrate (102). A staircase structure (142) is formed on one side of the dielectric stack (104). A dummy hole extending vertically through the staircase structure (142) and reaching the substrate (102) is formed. A spacer (138) having a hollow core is formed in the dummy hole. A TSC (136) in contact with the substrate (102) is formed by depositing a conductor layer (140) in the hollow core of the spacer (138). The TSC (136) extends vertically through the staircase structure (142).

Aus der internationalen Anmeldung WO2020140190

Streitverfahren
DatumVerfahrenKammerArtErgebnisParteien
7. Nov. 2025UPC CFI 1041/2025Dusseldorf LDVerletzungGesperrtYangtze Memory Technologies Co., Ltd. +4
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